The machine
A tuned BLAS selects kernels from what it finds at runtime — cache geometry, core count, microarchitecture. A newer chip generation in the same rack can take a different path through the same library and return a different low bit.
Same input. Same bits.
Every number a tuned BLAS gives you is conditional on the machine it ran on. Change the chip generation, the instruction set, or the library, and the low bits move. VVE has no tuned kernel underneath and nothing to dispatch on, so there is nothing for the machine to change.
In plain terms
What bit-identical means, and why it is rare.
The evidence below is a grid of fingerprints that all match. Here is what a fingerprint is, why other libraries cannot produce the same one twice, and what the guarantee covers.
- Bit-identicalWhat is being compared?
One result, four builds of VVE
- x86 · GCC0.70710678118654752
- x86 · Clang0.70710678118654752
- Arm · GCC0.70710678118654752
- Arm · Clang0.70710678118654752
identical, every bit
Illustrative digits. The real digests are in the grid below. A computer stores every number as a pattern of bits. Two answers are bit-identical when every bit matches, not just the first several digits a person would read. We check that with a digest, a short fingerprint computed from the whole result: the same answer always gives the same fingerprint, and a change anywhere in it changes the fingerprint. The records on this page are those fingerprints, compared across machines.
- DispatchWhy do other libraries differ?
A tuned math library, two chips
- chip A0.70710678118654752
- chip B0.70710678118654746
the last digits moved
Illustrative digits: the same number as two chips return it through a tuned library. A tuned math library looks at the chip it is running on and picks the fastest code path for it. Different paths add and multiply in a different order, and with floating-point numbers the order changes the last digits. So the same program on a newer chip, a different architecture or a different library underneath returns a slightly different answer. VVE EigenCore has one code path and nothing to pick from, which is why the fingerprints match.
- ScopeWhat does the guarantee cover?
One build of VVE, given the same input, returns the same bits across the axes listed on this page: repeated runs, two compilers, two processor architectures and two generations of chip. It is not a promise across VVE versions. An improvement to the algorithm can legitimately move the last bit, and the page says so rather than hide it.
One input. Four builds. One answer.
| Build | eigenvalueidentical | eigenvectoridentical | eigenpairidentical |
|---|---|---|---|
| x86_64GCC 13.3 | de83a41141e8dccc | 1bb3ba6f626baff2 | ea23b02abc1faf82 |
| x86_64Clang 18.1 | de83a41141e8dccc | 1bb3ba6f626baff2 | ea23b02abc1faf82 |
| aarch64GCC 13.3 | de83a41141e8dccc | 1bb3ba6f626baff2 | ea23b02abc1faf82 |
| aarch64Clang 18.1 | de83a41141e8dccc | 1bb3ba6f626baff2 | ea23b02abc1faf82 |
96 records, zero mismatches
-ffp-contract=off. The comparison was executed on the ARM machine, not on the machine that produced the x86 results.The axis that actually varies.
Reproducibility arguments get lost when the axes are not named. Here are the three that move in real deployments, and what each one does to a tuned BLAS.
The instruction set
Intel/AMD (x86_64) and Arm (aarch64) chips fuse a multiply and an add differently, and a library compiled to exploit each one will not agree with itself across the pair. This is why reproducibility modes are scoped to a single ISA family.
The BLAS implementation
The same LAPACK call served by netlib, OpenBLAS or MKL is three different computations. Swapping the library underneath an application is a routine operations decision and it silently changes the answer.
VVE removes all three at once, because it has no BLAS underneath to vary. The guarantee is structural rather than configured.
Measured at campaign scale.
8-way grid — PASS
96
SHA-256 records, 12 matrix/size groups, zero mismatches
Different chips, different compilers
Twelve matrix and size groups, including odd-N wilkinson, hashed on every build in the grid and compared record by record. Ninety-six records, zero mismatches. The manifests are signed.
Across hardware generations.
Cell fingerprints identical across CPU generations
541
between an older and a newer AMD generation (Zen 3, Zen 4/5) — cell fingerprints identical
Different chip generations
The full campaign was re-run end to end on an older machine generation. Wall clock moved, as it always does. Every one of the 541 cell fingerprints came back identical. This is the axis that matters to anyone whose validation evidence has to survive a hardware refresh.
Not a mode. A property.
Reproducibility features in tuned libraries are opt-in modes that cost performance and hold only inside a boundary — one instruction-set family, one dispatch path. They exist because the library is not reproducible by default, and they are the vendor's honest admission of it. VVE does not have a reproducible mode, because it does not have a non-reproducible one. There is no kernel selection to freeze and no dispatch table to pin.
| Stack | Same bits across machine, chip family and math library |
|---|---|
| LAPACK + OpenBLAS | No |
| Intel MKL | Conditional — its reproducible mode holds within one chip family |
| Eigen (C++) | No |
| ReproBLAS | Kernels only |
| VVE EigenCore | Yes — measured |
Signed evidence.
The determinism manifests are signed with minisign. The public key ID is 7567EB6FD671C361; the private key never leaves the signing machine. Each manifest records the build, the platform, the matrix and size group, and the digests — enough to check a claim record by record rather than take the summary on trust.
Evaluation includes the signed manifests and the harness that produced them.
Request an evaluation →What the guarantee covers.
- Across runs
- The same build on the same machine returns the same bits, every time.
- Across compilers
- GCC and Clang builds of the same source agree.
- Across architectures
- Intel/AMD (x86_64) and Arm (aarch64) agree.
- Across hardware generations
- An older and a newer AMD generation (Zen 3, Zen 4/5) agree.
The speed side of the same record is on the benchmarks page. The workload that needs both at once is array signal processing.
Bring us a matrix.
Tell us the spectra you actually run and the hardware you have to run them on. We send an evaluation build and the harness we measured with, so the first number you see is one you measured yourself.